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THAT YEAR THE IBM PC could NOT boot without mouse plugged in, but the Apple Lisa checked for mouse being plugged in AFTER boot 60 times per second.

Steve Jobs gloated it as a major feature in New interviews for years... mentioning that Apple users can plug in a mouse after boot, unlike any IBM PC machines.

Also.. a few later years... Apple created ADB bus mice that rolled a random digital ID number at connection and a user could have up to 16 actual working mice all fight over the mouse at the same time (whoever moved moved the mouse).

Then steve jobs made the mac boot without a screen, or up to 16 screens!!!! I plugged in 6 video cards and 6 tubes and stretched one window across 6 mac monitors!!! No PC could do that for over a decade later.

The mac had everything virtualized. mice , keyboard, screen.

Most videos of Lisa on the net are really modded Lisas using macintosh ROMS, inserted in later years, to run mac software.

Menu fonts give it away.

Also this machine did something no computer normally ever did... it WIRED UP A CISC INSTRUCTION FROM CPU that did a non interruptable indivisible READ TEST WRITE of a byte in one opcode.

in 2021 not one computer on earth allows that type of semaphore (mutex)

68010 TAS!

The instruction is a MC68010 TAS (Test and Set Instruction) and is the rarest fact on that Lisa a person can ever know on earth and is only in my head it seems. And now its in your head.

From MC68010 notes :

READ-MODIFY-WRITE CYCLE. The read-modify-write cycle performs a read, modifies the data in the arithmetic-logic unit, and writes the data back to the same address. In the MC68010, this cycle is indivisible in that the address strobe is asserted throughout the entire cycle. The test and set (TAS) instruction uses this cycle to provide meaningful communication between processors in a multiple processor environment. This instruction is the only instruction that uses the read-modify- write cycle; and, since the test and set instruction only operates on bytes, all read-modify-write cycles are byte operations. On the MC68012 the RMC pin is asserted, throughout the entire read- modify-write cycle

from https://archive.org/stream/bitsavers_motorola68eetMay85_6807514/68010_68012_Data_Sheet_May85_djvu.txt

you people here have no idea on earth how exotic and rare the TAS instruction is and how rare it is to ever wire up the RMC pin to allow it to perform a mutex semaphore on RAM.

In 2021 and even 1983, no TAS instruction is needed if you can disable cache and use a algorithm to flip lightswitches in a special sequence to simulate this hardware :

Dekkers lost 1966 algorithm : https://en.wikipedia.org/wiki/Dekker%27s_algorithm

That code from 1966 work fine on all 2021 CPUS as long as you can suppress caching of bytes ina single cacheline to ensire a cpu core is touching real ram not L2 cache or L2 cache, or L3 cache. avoiding cache is a trivial thing on all chips.. you use one 128 bit cacheline per variable in dekkers, but in 1966 he did not dream of a 128 bit ram cachelines..

That second fact on dekkers algorithm is the second rarest fact on the internet, unknown by 99.999999% of systems engineers and scientists.

Buy YOU know! You know about it and know about the 68020 TAS that that Lisa had planning for a future Lisa with TWO cpus that never shipped.

THAT YEAR THE IBM PC could NOT boot without mouse plugged in, but the Apple Lisa checked for mouse being plugged in AFTER boot 60 times per second. Steve Jobs gloated it as a major feature in New interviews for years... mentioning that Apple users can plug in a mouse after boot, unlike any IBM PC machines. Also.. a few later years... Apple created ADB bus mice that rolled a random digital ID number at connection and a user could have up to 16 actual working mice all fight over the mouse at the same time (whoever moved moved the mouse). Then steve jobs made the mac boot without a screen, or up to 16 screens!!!! I plugged in 6 video cards and 6 tubes and stretched one window across 6 mac monitors!!! No PC could do that for over a decade later. The mac had everything virtualized. mice , keyboard, screen. Most videos of Lisa on the net are really modded Lisas using macintosh ROMS, inserted in later years, to run mac software. Menu fonts give it away. Also this machine did something no computer normally ever did... it WIRED UP A CISC INSTRUCTION FROM CPU that did a non interruptable indivisible READ TEST WRITE of a byte in one opcode. in 2021 not one computer on earth allows that type of semaphore (mutex) **68010 TAS!** ======= The instruction is a MC68010 TAS (Test and Set Instruction) and is the rarest fact on that Lisa a person can ever know on earth and is only in my head it seems. And now its in your head. From MC68010 notes : > READ-MODIFY-WRITE CYCLE. The read-modify-write cycle performs a read, modifies the data in the arithmetic-logic unit, and writes the data back to the same address. In the MC68010, this cycle is indivisible in that the address strobe is asserted throughout the entire cycle. The test and set (TAS) instruction uses this cycle to provide meaningful communication between processors in a multiple processor environment. This instruction is the only instruction that uses the read-modify- write cycle; and, since the test and set instruction only operates on bytes, all read-modify-write cycles are byte operations. On the MC68012 the RMC pin is asserted, throughout the entire read- modify-write cycle from https://archive.org/stream/bitsavers_motorola68eetMay85_6807514/68010_68012_Data_Sheet_May85_djvu.txt you people here have no idea on earth how exotic and rare the TAS instruction is and how rare it is to ever wire up the RMC pin to allow it to perform a mutex semaphore on RAM. In 2021 and even 1983, no TAS instruction is needed if you can disable cache and use a algorithm to flip lightswitches in a special sequence to simulate this hardware : Dekkers lost 1966 algorithm : https://en.wikipedia.org/wiki/Dekker%27s_algorithm That code from 1966 work fine on all 2021 CPUS as long as you can suppress caching of bytes ina single cacheline to ensire a cpu core is touching real ram not L2 cache or L2 cache, or L3 cache. avoiding cache is a trivial thing on all chips.. you use one 128 bit cacheline per variable in dekkers, but in 1966 he did not dream of a 128 bit ram cachelines.. That second fact on dekkers algorithm is the second rarest fact on the internet, unknown by 99.999999% of systems engineers and scientists. Buy YOU know! You know about it and know about the 68020 TAS that that Lisa had planning for a future Lisa with TWO cpus that never shipped.

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